This month sees the start of a major new series following the design and construction of the Programmable Digital Sound Generator, a newly-developed, highly versatile add-on music system for microcomputers. Initially, the PDSG will be available to interface principally with the BBC Model B micro, though other versions should become available in due course. In the first article, designer Alan Boothman of Clef Products outlines the principles behind the unit's operation, far removed from that of conventional synths and add-on systems.

PDSG SPECIFICATION AT A GLANCE

PDSG HARDWARE

CURRENT SOFTWARE (PROVISIONAL)

18 Instruments in each set
8-32-note polyphony, programmable
1-4 Logical Oscillators per note
11 Characteristics Per Oscillator
4 Touch Tables (on/off)
4 Frequency Tables
32-64 Waveform selections
3 Channel positions
Edge rate control of attack
Decay, sustain & release (2)
Level control of attack & decay
Routines
Play keyboard
Play record sequence
Replay sequence with keyboard active
Repeat play sequence continuously
File a sequence
Load a filed sequence
Inspect instrument specification
Alter instrument specification
Alter instrument parameters
File a single instrument spec
Load a filed instrument
Create an 18-instrument set
Load an alternative instrument set
Load an alternative wave set
Create a single complex waveform
Play up to four waveforms under creation within an Instrument Spec
File single complex waveforms
Analyse single waveforms
Create a 16-waveform set

KEYBOARD HARDWARE

Musical compass 61 Notes C-C
Two foot controls
Key velocity-sensitive action
Powered from PDSG via 20-way cable

This series of articles will describe a polyphonic digital music system, developed by Clef Products (Electronics) Limited, which has been conceived to fulfil the requirements of the musically-inclined home computer owner, and to have a performance specification which will attract all levels of musical involvement. During the series, the sound-generation peripheral and a plug-in keyboard unit will become available for use with the BBC Model B micro. A major purpose of these articles is to promote experimentation by readers involved in all facets of computer music, both amateur and professional, by presenting an explanation of the principles involved in the technology and a detailed description of both the hardware and software interfaces with the host computer, which will allow complete flexibility of programming and a link to other computers if they are more readily available. It is envisaged that the price of the music system will be around £400, roughly equally split between the sound generation package, which can be used alone for non real-time input activities, and the keyboard unit.

Sound Generation Peripheral

The traditional method of sound synthesis is to start with oscillators, of either voltage control or multi-divisional type, which generate simple waveforms such as square wave and sawtooth. These waveforms contain many harmonics which, in order to give a variety of musical sounds, need to be filtered to shape the audio spectrum and remove unwanted components. Using multiple VCOs, waveforms can be mixed to produce more complex sounds, but the cost of this sort of hardware can rapidly become very high and relative tuning stability can be difficult to maintain.

The heart of the music system to be described has been termed the Programmable Digital Sound Generator (PDSG), and it was initially designed to cope with some of the problems mentioned above.

Oscillators are replaced by the concept of logical programmable digital sound generators, which are capable of feeding out any cyclic waveforms which have been fed into their waveform memories, thus eliminating the need to add harmonic shaping by the use of filters and allowing precise control of harmonics which would otherwise have to be provided by multiple oscillators.

The frequency (or pitch) of the emitted sound can be accurately controlled by calculated data fed from a controlling (host) computer. The use of electronic multiplexing allows efficient utilisation of sound-generating hardware to produce 32 identical logical generators, each with a wide audio bandwidth, from one piece of hardware. Envelope control of each generator is independent and is represented by a stream of data from the host computer, and since the shape of this is automatically stored in memory, complete recall and modification of the parameters is instantly available.

The PDSG has been enhanced to give programmable spatial placement of the sound output in terms of three-position stereo, and waveforms can be freely and instantly selected for each generator individually, a minimum of 32 different waveshapes being available.

Coupled with a DC power supply, the PDSG provides a complete non real-time sound-generation system which can be programmed to use between one and 32 generators per note and may typically be configured as eight-note polyphonic, each note having four accurately tuned generators with different complex waveforms and separate envelope and stereo positional control. This results in effective dynamic tonal sweeps in the simulation of conventional or other musical instruments, which can be taken to the extreme of a monophonic system using all 32 generators!

Real-Time Control

The PDSG has been designed to include an auxiliary computer bus which, although primarily intended to cover the optional keyboard input, also provides a two-way hardware link for extra input/output facilities, which at this stage have not been dedicated to any particular function on the assumption that a music system of this performance will invite further expansion when its full potential is realised.

The keyboard is 61 notes in length and incorporates foot controls and a velocity-sensitive action. Real-time recording on the keyboard provides touch-sensitive data which can be used with the required instrumentation at or after the time of recording. It has been well demonstrated that touch-sensitivity can be an extremely useful effect, sounding particularly dramatic when used in conjunction with voices replicating non-touch-sensitive acoustic instruments. For example, using a rich three-generator string ensemble effect (10% notes polyphonic to handle sustain), high levels of output can be reduced dramatically by replaying the chord with progressively less energy - the conductor diminuendo? Future programming for music keyboard operation is expected to cover multitrack recording and keyboard splits to give greater freedom in the use of multi-instrument orchestrations.

The requirements for a complete music system using the BBC Model B computer are illustrated in Figure 1. The PDSG and PSU are mounted in a box next to the computer, working off the 1MHz bus, and the keyboard plugs into the PDSG.

All controls are programmed into the computer keyboard, and the monitor provides a display of all activities from instrument selection to waveform creation and analysis. Whilst stereo output is available to connect with a normal Hi-Fi system, easy connection to group amplification is also possible.

Waveform Sampling

The method used to generate audio tones is illustrated in Figure 2. Depending on the type of waveform memories used in the PDSG, between 32 and 64 waveform tables can be stored on the board. The normal configuration is for 16 or 32 to be stored in EPROM, whilst 16 are fed into RAM from the host computer, and may be altered as required. A second RAM can replace the EPROM to give 32 programmable waveforms, or two 2732 EPROMs may be used to give a total of 64 non-adjustable waveforms.

Each waveform table contains 128 bytes, ie. numbers between 0 and 255, which define the instant amplitude or contour of the waveform, and normally cover the values required over the period of one cycle. Since it is diagrammatically difficult to show a 128 byte table, the number of entries in Figure 2(a) has been reduced to 16 to explain the basic principles and the amplitude values are between 0 and 15.

In order to produce a sound from the sequence of stored values, it is necessary to convert each number to an analogue voltage and to allow a period of time to elapse between the production of each amplitude step, and this is achieved by the use of a digital-to-analogue converter (DAC). If this period were to be adjustable, then increasing the time between steps would result in a longer time being taken to scan through a complete cycle and give a lower-frequency audio output.

The method used to achieve variable frequency in the PDSG is to adopt a fixed time interval but vary the distance moved along the x-axis of the diagram after each time period. There are 16 steps (0-15) shown in the diagram such that if, for example, a time interval of 0.2ms were chosen and the distance moved (incremented) after each time interval was 1, then it would take 3.2ms to scan the complete cycle, which would correspond to a frequency of 312.5Hz. This is shown in Figure 2(b) and it can be seen that each step appears in the resultant waveform.

If, however, an increment of 1.33 were chosen with the same time interval, then the cycle would be completed in 2.4ms corresponding to 416.67Hz, and as shown in Figure 2(c), some of the amplitude steps would be missed to compensate for the increased scanning rate through the table. Figure 2(d) illustrates the situation when the increment is less than one, and in order to compensate for the lower rate of scan, some amplitude steps are repeated to fill in the waveform. This is achieved by counting in such a way that an increment of 0.67 (which gives a sum of 0, 0.67,1.33, 2.0 etc.) results in obtaining table values at 0, 0, 1,2 etc. simply by dropping the fraction. When the maximum count of 15 is reached, the movement along the x-axis is folded back, (eg. 15.5 becomes 0.5) and the process continues to cycle.

This technique has a number of attractive features, the first of which is that a single waveform table can be used to achieve a number of audio output frequencies at the same time, using the technique of multiplexing. In the simple example above, 0.2ms is available to add 0.67 to the previous number along the x-axis and output its corresponding amplitude value to the DAC.

Since much higher mathematical speeds are available to us, it is possible to carry out a number of such additions within the overall time interval, each using different increments. Thus, if we wish to obtain the three waveforms in Figures 2(b)-2(d) simultaneously, we can allocate one third of the time interval (67us) to each. This is illustrated in Figure 2(e) where the waveform of Figure 2(d) has been chopped into time segments containing the amplitude value of that waveform in the first 67us, leaving the remaining 133us to be split between waveforms 2(b) and 2(c). At a later stage, it is necessary to produce a composite audio signal by analogue addition but with individual waveforms available in this chopped state, the second feature of the technique can be seen - namely that, before combination of the signals, circuitry may be incorporated which directs individual signals to a chosen output location. In the case of the PDSG, this represents three-position stereo.

Logical Oscillators & Performance

The above describes the concept of Logical Oscillators, where a group of components constitutes a single hardware circuit which may then be used to give a simulation of multiple oscillators. The limits on how the technique may be used are determined purely by the performance required.

The first area for consideration relates to the situation which prevailed in Figure 2(c) where parts of the waveform table were being skipped. Although increasing the increment will only gradually reduce the detail of the waveform as more steps are missed, there will come a point (when the increment reaches eight) where if it were exceeded the waveform would suddenly make no sense, since even its cyclic information will then have disappeared. The time interval of 0.2ms used in the examples above - when converted to a frequency of 5kHz - is known as the sample rate. With an increment figure of 8, the time to scan the values would be two amplitude values or 0.4ms, giving a square wave of 2.5kHz. After that point, the square wave would break up giving considerable distortion and noise. This is called the Nyquist frequency, and results from a theorem which states that in a sampling system the maximum bandwidth, before distortion, is slightly less than one half of the sample rate.

Even if all frequencies used were held below the Nyquist frequency, a second effect has to be considered which is fundamental to a sampling system. A signal frequency of 2kHz sampled at 5kHz produces an unwanted difference frequency of 3kHz. This is called the alias frequency, and if heard it normally appears as non-harmonically related distortion. The term 'aliasing' is used to cover the onset of audible distortion as it occurs. Sharp low pass filters are used to attenuate the alias frequency above the Nyquist frequency, thus reducing the distortion, but since the difference frequency for a signal frequency of 3kHz sampled at 5kHz is 2kHz, which is in the required pass band, filters cannot compensate for the limit set by Nyquist. The challenge, therefore, is to achieve a high sample rate to obtain a good audio bandwidth.

The 5kHz (0.2ms) sample rate chosen for the explanation of the theory comes from a real system where the audio bandwidth requirement is extremely modest, and represents the capability of a single microprocessor carrying out a considerable amount of control work, in addition to producing polyphonic music by executing the mathematics outlined above. However, the PDSG requirements cover a much broader audio spectrum and were initially chosen to be based on a Nyquist frequency around 16kHz, giving a sample rate of 32kHz. Within the resulting available sampling interval of 32us, a typical microprocessor could handle two or three Logical Oscillators if it was used as dedicated hardware, whereas standard computing hardware running at 2MHz can perform the addition and output-to-DAC routines for one oscillator in a period of one microsecond, thereby giving the potential of 32 Logical Oscillators with a good audio bandwidth. The latter technique is the basis of the PDSG, which in its practical form is clocked at approximately 1.9MHz, giving a Nyquist frequency of around 15kHz.

The Practical System

A schematic of the PDSG is shown in Figure 3. Stepping along the waveform tables is achieved by adding an existing value in the hardware accumulator to an increment stored in the Frequency Register which corresponds to the required audio frequency for one logical oscillator. The register and accumulator are actually RAMs and require 64 bytes, giving two bytes per oscillator. Seven bits of data are fed through a latch (Music Address Low) to the address lines of the waveform memory to give the 128-byte cycle, and the remaining nine bits from the two bytes are used as fractional numbers in the addition process to give accuracy in frequency definition. Using the two bytes, therefore, two additions take place within one microsecond to determine which steps of the waveform should be fed out to the tone DAC. The remainder of the 64 bytes are then processed in the same way to give independent positions within the waveform for each of the other 31 logical oscillators.

The frequency section of the PDSG spends most of its time continuously cycling in this manner, and is controlled by the PDSG clock which has a fine frequency adjustment to give overall audio tuning. The counter splits the overall cycle into 64 parts and is always connected to the accumulator. When a new frequency is required from one of the oscillators, the Music Load Buffer isolates the counter from the Frequency Register, which is then forced to the location on the Music Address Latch corresponding to the oscillator requiring a change to the value presented by the Music Data Latch (via the Frequency Load Buffer). This transfer occurs automatically, in synchronisation with the counting operation, when the host computer sends a new piece of data (increment) for that location.

Tuning Accuracy

Unlike many standard generation techniques, the method described is most accurate in tuning at high frequencies, where the theoretical accuracy is approximately 0.02% and drops to 0.73% at 65Hz. However, since the PDSG has onboard fine tuning, it is possible to table a set of increments for a musical scale where the worst notes in the bottom octave are better than 0.2%, without the need to add further expensive bytes of fractional addition. Furthermore, it is also possible to construct and use tables of alternative tunings such as Just, quarter-tone, or mean temperament.

Level Register

In order to determine the output level of each logical oscillator to give envelope control, a further RAM, known as the Level Register, has 32 bytes (one for each oscillator) containing a number between 0 and 255. This number represents the output level. There are also a further 32 bytes to determine which waveform and which output channel should be used by each oscillator at a particular moment. This 64 byte sequence is cycled in parallel with the Frequency Increment data such that every 32 microseconds, each logical oscillator is told which segment of which waveform table to output to which channel and at what level. The Level Register can be synchronously updated by the host computer in a similar manner to the Frequency Register.

Waveform Loading

A single table in the waveform memories is usually addressed by the numbers cycling in the accumulator via the latch labelled Music Address Low, but synchronous loading of a new table is possible by disabling MADL and forcing the data from the Wave Data Latch into the waveform memory location determined by the Waveform Address Low Latch. 16 waveforms can be stored in a 2K x 8 RAM or EPROM, with 32 in a 4K x 8 EPROM. The choice of waveform table is made via either the Music address High Latch from the Level Register, or the Waveform Address High Latch which has been loaded from the host computer.

Analogue Processing

The data from the waveform memories is taken to the tone DAC, which converts each byte to an analogue voltage. The tone DAC is controlled by the level DAC, which converts envelope information in the Level Register. At this point, the multiplexed waveform data can be directed to one or both of two Sample and Hold circuits, splitting the final destination of each oscillator as required. The S&H circuits are controlled by logic which receives its instructions from the Level Register via two bits of the MADH Latch. The low crosstalk circuit used in the Sample and Hold is also designed-to act as a noise gate to give a quiet quiescent state, and in addition to splitting and stretching the signal for the two channels, it balances the third stereo position to the centre with reduced volume in each channel. The final part of the audio chain sums the multiplexed signals in each channel, and is followed by a sixth order low pass filter giving 40-50dB attenuation at the Nyquist frequency and a useful audio bandwidth in the region of 11-12kHz. Output level adjustment is provided to cope with high-sensitivity amplification equipment.

Auxiliary Activities and Logic

The above covers the fundamental operation of the PDSG, but it should be remembered that most activities are occurring at a rate of around 2MHz, leading to a requirement for very precise timing and therefore quite a large number of additional logic gates. In order to give a reliable interface with the host computer, and to cope with the fact that the PDSG is operating asynchronously to the host, both data and address latches are provided on the PCB. The BBC decoding and operation of the latches will be described in more detail later on in the series when hardware assistance will also be given for linking to other computers. An interrupt oscillator is included in the PDSG, which provides pulses at 2ms intervals, and can be inhibited by the control register, which also determines which mode of operation is currently active on the board.

The auxiliary bus consists of three devices which give two-way buffered operation and these devices are normally omitted from the PDSG when keyboard operation is not envisaged. Connections for this bus and the 1 MHz link to the BBC are given in Figure 3.

Supplies to the PDSG are +5volts regulated at 700mA, + 10.5V at 50mA and -11.5V at 50mA. The higher voltages are reduced to +/- 7.5V using Zener diodes on the PCB.

Next month's article will describe the various uses to which the PDSG can be put, and there'll also be an in-depth technical analysis of the system's workings. Pricing and availability details for the hardware will be announced shortly.