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Augmenting the 3750's Memory

Article from Polyphony, April/May 1978



When it comes to electronic drum machines, the PAIA 3750 is pretty unique. The reason is obvious. Aside from the almost irresistible touch pad controls, it's programmable! This one feature gives the user a definite advantage over working with conventional type drum machines in that you can make up, and enter into the machine's memory, your own rhythmic patterns using whatever combination of the available drum sounds you like. Further, when it's time to go to the bridge of the song, you have the option of letting the main score continue to play, or causing the 3750 to "bridge" so that it will play what you have previously programmed there. Both main score and bridge can be set up to 64 events long, and there are two of each. That's a total of 256 events, which translates to 256 bytes of memory in the machine. When in use, some of these will contain "rest" commands (no drum sound). For most practical applications, that's plenty, but there are always those of us who can't leave well enough alone. Besides, there are some very worthwhile advantages to be gained for very little expense and a couple hours work.

Suppose there were 512 events, room for 4 scores and 4 bridges. And suppose that two scores, or two bridges could be played back at the same time. Now you could not only get twice as much music in the machine, but you could also do multi-tracking! But the only way to have more than the original 256 events available in the 3750 is to add more memory, right? Sure!

Ordinarily this might be a bit of a problem, but we're in luck here, because we're dealing with tri-state chips. Standard logic RAM would be capable of assuming one of two conditions — "read" where data is taken from the memory, or "write" where new data is loaded into the memory. In either case, the data appearing on the lines connected to the memory will affect, or be affected, by the memory. Tri-state devices can assume a third condition in which the data lines "float". They do not specify data, and they may be manipulated without affecting the contents of the memory. This makes it possible for more than one IC chip to occupy the same location. With some very careful soldering techniques, you can cascade the 2112 type memories so that two ICs occupy each memory chip location (ICs 14 & 15). Then the chip enable line can be routed to either of the two pair of IC's via a SPDT switch. The schematic of the completed modification is shown in figure 1.

FIGURE 1
(Click image for higher resolution version)


CASCADING THE MOS CHIPS



No doubt there are many ideas on safely handling MOS devices, and some will prefer their own time tested techniques, but allow me to briefly outline how I went about it.

FIG. 2

A piece of aluminum foil folded once or twice makes an effective pin shorting element and an excellent heatsink at the same time. Remove IC 14 from its socket on the 3750 PC board. Stab the pins carefully through the sheets of foil. Then position one of the two new chips (2112) on top of IC 14, piggy-back style (See figure 2). Check that the notches on both packages are at the same end, and the pins of the new chip, (A) slide snugly over those of IC 14. Pin 13 WILL NOT BE SOLDERED!

All other pins will be soldered; pin 1 of IC A to pin 1 of IC 14, — pin 2 of IC A to pin 2 of IC 14, and so on, with the exception of pin 13. This is the enable pin, or in this case "not chip enable" (ce). This pin on IC A should be bent outward slightly so as not to make contact with pin 13 of IC 14. Remove the foil shorting material. At this point IC 14, with the new 2112 on its back, can be reinstalled in its socket, and the piggy-backing process repeated with IC 15 and the other new chip.

PULL-UPS AND MEMORY SELECT SWITCH



As we said, pin 13 is the "not chip enable" pin, so the memory can function normally as long as this pin is held at ground. If pin 13 is held high, the memory cannot be written into or read from at any address, and the data lines float. To insure that the ce lines of either block of memory stay high during the period in which that block is not being used, we will install 33K pull-up resistors between the positive 6 volt supply and pin 13 of ICs 14 & 15, and between supply and pin 13 of the new memory chips. Positive supply can be tapped at TS 1 lug 2. One end of each 33K resistor should be soldered to this lug, leaving the other end of each resistor suspended free. A 5" length of light guage wire is connected to the free end of one of the resistors. The other end of this wire connects to the solder pad or foil trace that leads to pin 13 of IC 14 & IC 15.

The second 33K is installed between positive supply and pin 13 of ICs 14A and 15A. These two chips should have their #13 pin sticking out to the side of the package making no connection. A 6 inch length of light gauge wire can be used to connect pin 13 of IC 14A to pin 13 of IC 15A, and then to the free end of the second 33K resistor. The line that normally drives the ce pins of the original IC 14 and IC 15 originates at pin 4 of IC 10. This line connects to the memory ICs by way of a wire jumper which is directly above R124 on the PC board. Remove this jumper and connect one 12" length of light gauge wire to each of the two solder pads where the jumper had been connected before. Now, locate the free end of the wire which you connected to the pad that connects by copper trace to pin 4 of IC 10. This will attach to the common lug (wiper) of a SPDT switch. Each of the remaining two switch lugs should now be wired to the junction of one of the pull-up resistors and the wires leading to the "ce" lines of the two memory banks.

Operation of the unit will be the same as before, with one simple difference. When you've programmed 4 pages of memory (both scores and both bridges), just change the position of the new switch and PRESTO! — another 4 pages to fill! This should prove particularly useful to you "one man bands", because you can go longer before reprogramming.

If you would like to take this concept a step further, you can do multitracking. If the SPDT switch discussed above were replaced with two SPST switches, each memory bank could be selected individually OR in unison. Now, with the score switch in the "1" position, and the new switches selecting "Bank 1" of memory, one score or bridge could be programmed. With the score switch still in the "1" position, and the new switches altered to select "Bank B", the first score in the second block of memory could be programmed to jive with the first score entered in "Bank 1". Now, because the first score in either bank of memory occupy the same address, (the same is true of the second score and the bridges), we can play both scores back at the same time by placing the new switches in the Simultaneous Enable positions and touching play.

While it's not impossible to have more than one drum sound occupy a single event with a stock 3750, it is at very best a tedious task, and not very practical in terms of real world musical applications. This modification makes it easy.

There may be one little problem here, caused by this memory expansion modification. The extra memory will increase the load on the power supply by a substantial amount. Some units may not run on batteries after this modification. In any case, the battery life will be considerably shorter. A simple regulated power supply, as shown in figure 3 will quickly solve the battery problem once and for all.

FIG. 3 AC POWER SUPPLY
(Click image for higher resolution version)


If the transformer used here has a sufficient current rating, say 1 amp or so, I see no reason why one could not elaborate on the memory expansion farther. Perhaps even to the point of adding a whole bunch of outboard memory (provided he is willing to sacrifice some of the portability of the 3750, and willing to do the point to point wiring that would be involved). You wouldn't have to stack the chips in a piggyback, but you would need some way to decode the addressing. A possible decoding scheme might look something like figure 4. The address lines would connect to the outboard memory ICs in the same way they connect to IC 14 and IC 15. In fact, all the pins of the expansion chips will connect in parallel to the corresponding pins of IC 14 and IC 15, with the exception, once again, of pin 13. We can set up 7 of these blocks external to the 3750, 14 memory chips in all. In each block, the #13 pin of each of the two chips of that block will be tied together, pulled up, and fed to the automatic "Bank select" circuitry. This is where the decoding comes in.

FIG. 4 OUTBOARD MEMORY PROCESSING
(Click image for higher resolution version)


Let's back up and take a look at the counter in the 3750. Only 6 bits from the counter are used to address the memory. That leaves us with the most significant bit unused, until now. We'll use this bit to tell us when the counter has cycled once through one complete 64 event score. This 7th bit will become address line A0 to a 4051 multiplexer chip, and also the input to a 4013 D type flip-flop whose output will serve as line A1 of the 4051. This line also connects to the input of a second flip-flop whose output is A2 of the 4051. Each of the eight output lines (Y0 through Y7) of the multiplexer chip will connect to the Z pin, one after the other as the 4024 counter cycles over and over again. This is, of course, assuming that there are no repeat instructions programmed into the first score. The Z pin of the 4051 is connected to the enable driver IC 10, pin 4 on the 3750 PC board. The enable line of each block of outboard RAM will connect to one of the pins Y1 through Y7 of the 4051, or to the enable driver directly as determined by a SPDT switch in each line. The #13 pins of IC 14 and IC 15, on the 3750 PC board are connected to a SPDT switch which can select between the enable driver and Y0 of the 4051. This way, we can play each score in each block sequentially, or several scores at once for complex multi-track percussion backgrounds.

Pretty neat, huh? That's 2K bytes of memory if you do it this way — 2,048 events and brother, if that ain't enough, it's computer time!


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To Phase or to Flange


Publisher: Polyphony - Polyphony Publishing Company

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Polyphony - Apr/May 1978

Donated & scanned by: Mike Gorman

Feature by Steve Wood

Previous article in this issue:

> To Phase or to Flange

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> Expanding the Patchability o...


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