This article describes the construction and design of a voltage controlled clock which outputs a train of square waves at standard TTL level. It was designed to fulfil a need for my particular system which includes three Powertran 1024 digital sequencers, two custom-built analogue sequencers, custom-built patchboard, programmable percussion machine and recently an Amdek programmable rhythm generator. However, there's no reason why the unit shouldn't work perfectly in other systems.

When performing live or in a studio it is convenient to be able to have sequencers and percussion generators running together in synchronisation. It is also convenient to be able to change the speed at which the units are clocked quickly and easily, preferably with a bank of presets. Accordingly it was decided to use a Voltage Controlled Oscillator as the heart of the circuit and the CEM3340 IC was chosen for this purpose. It's not the cheapest available but if the correct high stability components are used in the frequency-determined circuitry it is very stable and very reliable. If it's good enough for Sequential Circuits to use I felt it was good enough for me!

Since it's useful to have different modules running at different speeds, the VCO is followed by a divider circuit which divides the basic clock pulse down by five stages. The outputs are buffered and each output can drive two standard TTL loads. The unit was originally configured on a 9" x3" panel so that it could be incorporated within the scheme of the standard Digisound 'system 80' synthesiser. The Curtis chip produces square waves, triangles and sawtooths as standard and therefore when not being used as a voltage control clock this unit can be used as a voltage controlled low frequency oscillator.

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Circuit Description

The heart of the unit is the CEM3340 voltage controlled oscillator. To understand how this works fully, the best thing to do is to get a CEM3340 data sheet from those awfully nice Digisound people. The frequency control voltage is injected into pin 15. The design allows for coarse and fine controls and also a preset mounted on the board, namely TP2 which sets the initial frequency with no other control voltage applied. Preset control voltages via R3 come from a variety of sources; in the prototype four 100K linear pots were mounted on the front panel and two jack sockets were provided for external control voltages. These were then selected by a six-way interlocking switch bank. A cheaper alternative would be to use a six-way rotary switch.

The facility to inject external control voltages means that the frequency of the clock can be controlled from a one octave per volt synthesiser keyboard or from a bank of digitally stored control voltages via a digital to analogue converter. Capacitor C4 is a frequency-determining component and should be a low-leakage type. The 3340 has temperature compensation incorporated into it through a very clever arrangement which the data sheets go into. This is an important factor in the design of a stable system clock and perhaps one of the best reasons for using the Curtis chip. The triangle waveform is the one that we are concerned with and is taken from pin 10 and buffered by a BC212L transistor. It is important to use the right polarity of transistor otherwise the Curtis chip will become as hot as one of its deep-fried brethren and not be much use afterwards!

The square-wave is derived from the triangle by using IC2, which is a CA3140 op-amp, as a comparator. The common connection of R11 and pin 7 of IC2 is taken to positive 5 volts for a 5 volt gate or positive 15 volts for a 15 volt gate. However, since we are concerned with TT levels the positive 5 volts is used in this application. IC4024 is a CMOS divider chip and the outputs of this are buffered by a Hex buffer IC5, a 4050 type. The outputs of this can each drive two TTL loads which is quite a hefty output for a CMOS device and should be adequate for most clocking arrangements. However, it would be possible to buffer these outputs further by means of CA3140 op-amps or transistor stages should this be required.

Moving further round the circuit we come to TP1 and TP3. In the prototype these were ten turned precision cermets. TP1 is to set the octaves per volts relationship, ie. it is adjusted until a one volt control voltage applied via R3 increases the frequency output by a factor of 2. TP3 is provided to adjust the high-frequency range. In this particular application this degree of accuracy is not required and it is quite permissable to replace each of these trimmers by a couple of resistors of the value of equal to half the preset resistance. On-board 5 volt supply for IC2 4 and 5 is derived by IC3 at 78L05.

(Click image for higher resolution version)

(Click image for higher resolution version)

Construction

This is quite straightforward. The usual CMOS handling procedures should be adopted for IC2, 4 and 5 and since IC1 is not a cheap component, observe handling precautions for this as well. Power supply can be connected to the board via a Digisound standard 'Chili' type connector. It is important to observe the polarity of C7, 8, and 9.

Various options are open to the user. Indication of clock-rate can be provided via a simple transistor driver and LED as shown on the circuit diagram. It can be useful to switch all of the clock outputs to a low state and this can be done by fitting switch S1. Should this option not be required, a link is fitted between points X and Y on the PCB. The outputs of the clock are all TTL pulse levels with 50% duty cycles. This may not be suitable for some applications and indeed was not found to be suitable for the Powertran sequencers.

For use with the Powertran sequencer it was found that the small circuit labelled Network 1 on the circuit diagram was necessary. Thereby the clock outputs were connected to a 10nF capacitor and a 47K resistor was connected across the output of this to earth potential. This gives a short spike pulse which triggers the Powertran unit satisfactorily. It was found that, despite what was said in the instructions, the Amdek RMK100 triggered quite satisfactorily from the unmodified clock outputs. However, this only occurs with my unit: I wouldn't like to take the consequences should any damage occur to anyone else's rhythm unit!

In other applications which require short pulses of precise duration, it would be possible to derive such a pulse from the use of Network 1 coupled with a 4047 CMOS monostable chip. One further modification that comes to mind is the inclusion of another control voltage input to allow a certain randomness to be introduced to the clock frequency, allowing a more human feel and less metronomic tempo.

Errata: Our constructional article on the Voltage Controlled Clock (pp 74-78) contained the following typesetting errors:-

Top right on the circuit diagram -'Network 1' - capacitor value is 10nF; resistor should go to ground. Bottom right, 'clock out' 45 should read 15. Component overlay: top right, C9 should read plus, not minus. Bottom middle, TR1 should be shown next to R19, 20.

In the final paragraph on page 78, the final sentence should read '...another control voltage input in parallel with R1, 2 and 3, whereby a small amount of heavily filtered white noise could be introduced to allow ...' and so on.