Project Blocks 1

A new feature to complement our projects. Each month aspects of design and development are outlined by the projects' authors.

The operational sections of the noise gate are outlined in the complete block diagram Fig 1. The signal is first applied to an input buffer amplifier whose gain may be adjusted from unity (X1) to +20dB (X10). Following this the signal is split three ways, one path goes to one side of the analogue switch, one goes to SW1 and another to the zero crossing detector.

Zero Crossing Detector

The zero crossing detector gives out a very sharp pulse every time the signal passes through zero and it consists of a comparator and one-shot. The comparator is made up of an operational amplifier with no feedback between its output and inverting input, and so it has, theoretically anyway, unlimited gain. The signal therefore overloads the amplifier causing it to switch hard between positive and negative and since the inverting input is tied to 0V, this switching takes place each time the signal is a fraction of a millivolt either side of 0V. The result is a square wave version of the original signal.

The one-shot consists of two NAND gates and its output when not triggered is normally positive because the NAND from which the pulse is taken has both its inputs held low (see NAND gate truth table), however both inputs are forced high during the charging period of the capacitor. Because the capacitor is very small the time is very small, and this short duration pulse occurs each time the output of the comparator goes from high to low (once in each cycle of the input). From this we have an indication that a cycle of input signal is about to start or finish, so when the switch is 'electronically thrown' there will not be any noticeable click.

Switch Control Logic

As has already been said the switch must turn on and off as the signal crosses zero, but it is also controlled by another signal, the trigger, therefore some sequencing logic is needed.

The requirement is this; when no trigger signal is present the switch must be open, and when the trigger is applied the switch must still be open until the signal's zero crossing pulse arrives. Once the switch closes it must stay closed, even when the trigger is removed, until another zero crossing pulse arrives — then it may open again.

The logic is based around a toggle which can be set and reset by taking one of its inputs high then low, so long as the other input is at the same time high. Wave forms around the logic control of the toggle are shown in Fig 2 and the letters refer to the points shown on the circuit diagram.

The trigger is derived from the chain consisting of the rectifier, time constants and comparator.

Full Wave Rectifier And Time Constants

The trigger can be from one of two sources, either the signal to be gated or some other external signal — the selection is made by SW1.

Because it is necessary for the gate to be opened by very low signals some precision is required in obtaining the trigger. This is done by first of all producing two versions of the signal, anti phase to each other, recovered from the emitter and collector of Q1. DC is removed by C5 and C6 and the signal is referred to 0V by R14 and R15. Each phase is then precision half wave rectified by IC7 and IC8 and recombined giving a full wave rectified DC voltage which follows the amplitude of the AC input to Q1.

The combined output of IC7 and IC8 is used to charge C7 via R16 and VR2 whilst C7 is discharged by R17 and VR3. The charging and discharging rates are variable so that time taken for the gate to react to a signal starting can be altered (delay) and the time taken for the gate turning off again once the signal is removed can be altered (recovery).

The voltage on C7 is monitored by comparator IC9 and when the voltage exceeds that derived from VR4 its output switches from negative to positive. The output from IC9 (the control trigger) is then fed to the logic.

Project Blocks 2

The blocks which comprise our Bass Synth complete this month's selection.

The block diagram Fig 1 shows the functional elements of the circuit. The operating frequency of IC1 is set by the clock oscillator components C1, R1 and VR1. This frequency is divided down to provide the two octave output. Varying VR1 changes the clock frequency and so acts as the pitch control. The LEDs and keyboard are scanned by the IC on an 8x4 matrix. This technique is a form of multiplexing. It allows 12 LEDs and 15 switches to be operated independently using only 14 lines from IC1. The same technique is used in nearly all calculators and computers for keyboard and display control. All the memory functions take place within IC1, which produces a tone output on pin 18 and a voltage pulse on pin 17 each time a new note period begins.

The tempo of the system is controlled by an external oscillator comprising IC2a, b and c. At the beginning of each note period pin 17 switches from a low state to a high state. IC1 then waits for input pulses from pin 20. Up to eight pulses are counted by IC1, depending upon the length of note programmed, before it passes on to the next note. The "Beat" lamp LED1, which is driven from IC1c, gives indication of each beat cycle. VR2 alters the speed of oscillation and hence the tempo.

The envelope control circuit takes a pulse from pin 17 of IC1. Each time a new note is played the voltage at pin 17 changes from low to high. This voltage change is inverted by IC2d and coupled via C3, R5 and D6 to IC2e. The effect of C3, R5 and D6 is to produce a short positive pulse at the output of IC2e each time a note is played. This positive pulse is used to charge C5 via D7 and the attack control. After the pulse, C5 discharges via D8 and the decay control. The voltage across C5 is buffered by Q1, which controls the voltage swing of the output stage and hence the output signal envelope. VR3 and VR4 control the rate of charge and discharge of C5 thus altering the attack and decay time constants.

The high level volume control VR5 provides an adjustable output to both the internal loudspeaker and the external amplification.